/Makefile/1.99/Sat Oct  5 06:19:56 2019//Tpkgsrc-2020Q1
D/MyHDL-gplcver////
D/MyHDL-iverilog////
D/adms////
D/atlc////
D/boolean////
D/cascade////
D/cgi-wcalc////
D/covered////
D/dinotrace////
D/dinotrace-mode////
D/diylc////
D/eagle////
D/electric////
D/fastcap////
D/fasthenry////
D/felt////
D/freehdl////
D/gdsreader////
D/geda////
D/gerbv////
D/ghdl////
D/gnetman////
D/gnucap////
D/gplcver////
D/gsmc////
D/gtk1-wcalc////
D/gtk2-wcalc////
D/gtkwave////
D/iverilog////
D/kicad////
D/kicad-doc////
D/kicad-footprints////
D/kicad-i18n////
D/kicad-packages3d////
D/kicad-symbols////
D/kicad-templates////
D/klayout////
D/librecad////
D/libwcalc////
D/magic////
D/mcalc////
D/mex-wcalc////
D/mpac////
D/nelma////
D/ng-spice////
D/ntesla////
D/oce////
D/openscad////
D/p5-gds2////
D/pcb////
D/py-MyHDL////
D/py-PyRTL////
D/py-gds////
D/py-gdscad////
D/py-simpy////
D/qcad////
D/qcad-partlibrary////
D/sci-wcalc////
D/solvespace////
D/spice////
D/spiceprm////
D/stdio-wcalc////
D/tkgate////
D/tnt-mmtl////
D/transcalc////
D/verilator////
D/verilog-mode////
D/veriwell////
D/wcalc////
D/wcalc-docs////
D/xchiplogo////
D/xcircuit////
